Current Openings

Open Positions:

Senior FPGA Design Engineer in Greenbelt, Maryland

The Senior FPGA Designer will be responsible for the design and development of advanced Sensors, instruments, and their associated advanced flight and ground support systems designs. The Senior Level FPGA Designer will leverage their extensive knowledge and expertise in FPGA hardware / firmware design techniques. This individual will be a design leader working in a fast paced, challenging, hands-on, research & development environment supporting Goddard Space Flight Center. The successful candidates will engage in FPGA design and development of new and evolving solutions for NASA/GSFC.

Specific duties will include:
• Development of advanced FPGA designs used in advanced flight and ground support systems in support of NASA space flight programs
• Conduct or Lead FPGA firmware design, simulation using ModelSim and integrate large FPGA designs from both Xilinx Virtex 5/6 and Actel RTAX FPGAs
• Conduct or lead the decomposition of FPGA specification into VHDL RTL architectures and module building blocks
• Conduct or lead FPGA design functional verification, synthesis, timing verification implementations verification, programming and device in-circuit verification
• Conduct or lead the development of Systems or subsystems test plans and test procedures
• Management of all aspect of FPGA design test configurations
• Identification and acquisition of resources necessary to perform design testing, and development of approaches and processes for test execution
• Lead problem resolution boards and capture actions and decisions made during these boards

Requirements:
• BS in Electrical Engineering, Computer Science, Physics or equivalent years of practical experience
• 20 years of experience in FPGA design, simulation, synthesis using VHDL language, ModelSim or Active VHDL simulation
• Experience with FPGAs and electronics for space flight applications, a plus
• Experience with DSP filter design using Xilinx FPGAs
• Experience with Xilinx ISE tools flow including synthesis, simulation, place and route, timing closure
• Experience with high-speed AD/DA conversion design
• Experience with system integration of FPGA design, high speed digital design, RF design
• Experience debugging at the firmware level as well as the system level using standard test equipment
• Experience in schematic design with FPGA devices
• Experience writing test procedures for FPGA design verification
• Experience in performing FPGA WCTA (Worst Case Timing Analysis)
• US Citizenship required, must be able to pass a Government background investigation

Location: Greenbelt, Maryland

Please send electronic resume to kyoder@carrastro.com